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vishay siliconix SIA527DJ document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com n- and p-channel 12-v (d-s) mosfet features ? trenchfet ? power mosfets ? thermally enhanced powerpak ? sc-70 package - small footprint area - low on-resistance ? 100 % r g tested ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ? portable devices such as smart phones, tablet pcs and mobile computing - load switches - power management - dc/dc converters notes: a. package limited. b. surface mounted on 1" x 1" fr4 board. c. t = 5 s. d. see solder profile ( www.vishay.com/doc?73257 ). the powerpak sc-70 is a leadless package. t he end of the lead terminal is exposed copper (not plated) as a result of the singulat ion process in manufacturing. a solder fi llet at the exposed copper tip cannot be guara nteed and is not required to ensure adequate bottom side solder interconnection. e. rework conditions: manual solder ing with a soldering iron is not recommended for leadless components. f. maximum under steady state conditions is 110 c/w. product summary v ds (v) r ds(on) ( ? ) max. i d (a) q g (typ.) n-channel 12 0.029 at v gs = 4.5 v 4.5 a 5.6 nc 0.034 at v gs = 2.5 v 4.5 a 0.044 at v gs = 1.8 v 4.5 a 0.065 at v gs = 1.5 v 4.5 a p-channel - 12 0.041 at v gs = - 4.5 v - 4.5 a 10.5 nc 0.060 at v gs = - 2.5 v - 4.5 a 0.110 at v gs = - 1.8 v - 3.5 0.174 at v gs = - 1.5 v - 1 orderin g information: SIA527DJ-t1-ge3 (lead (p b )-free and halogen-free) s 1 d 1 g 2 s 2 g 1 d 2 1 6 5 4 2 3 2.05 mm 2.05 mm powerpak sc-70-6 dual d 1 d 2 n -channel mosfet g 1 d 1 s 1 s 2 g 2 d 2 p-channel mosfet markin g code x x x e j x lot tracea b ility and date code part # code absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol n-channel p-channel unit drain-source voltage v ds 12 - 12 v gate-source voltage v gs 8 continuous drain current (t j = 150 c) t c = 25 c i d 4.5 a - 4.5 a a t c = 70 c 4.5 a - 4.5 a t a = 25 c 4.5 a,b,c - 4.5 a,b,c t a = 70 c 4.5 a,b,c - 4.4 b,c pulsed drain current (t = 100 s) i dm 20 - 15 source drain current diode current t c = 25 c i s 4.5 a - 4.5 a t a = 25 c 1.6 b,c - 1.6 b,c maximum power dissipation t c = 25 c p d 7.8 7.8 w t c = 70 c 55 t a = 25 c 1.9 b,c 1.9 b,c t a = 70 c 1.2 b,c 1.2 b,c operating junction and storage temperature range t j , t stg - 55 to 150 c soldering recommendations (peak temperature) d,e 260 thermal resistance ratings parameter symbol n-channel p-channel unit typ. max. typ. max. maximum junction-to-ambient b,f t ? 5 s r thja 52 65 52 65 c/w maximum junction-to-case (drain) steady state r thjc 12.5 16 12.5 16
www.vishay.com 2 document number: 64162 s13-1669-rev. a, 29-jul-13 vishay siliconix SIA527DJ this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com notes: a. guaranteed by design, not s ubject to production testing. b. pulse test; pulse width ? 300 s, duty cycle ? 2 %. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a n-ch 12 v v gs = 0 v, i d = - 250 a p-ch - 12 v ds temperature coefficient ? v ds /t j i d = 250 a n-ch 12 mv/c i d = - 250 a p-ch - 3.6 v gs(th) temperature coefficient ? v gs(th) /t j i d = 250 a n-ch - 2.5 i d = - 250 a p-ch 2.4 gate threshold voltage v gs(th) v ds = v gs , i d = 250 a n-ch 0.4 1 v v ds = v gs , i d = - 250 a p-ch - 0.4 - 1 gate-body leakage i gss v ds = 0 v, v gs = 8 v n-ch 100 na p-ch 100 zero gate voltage drain current i dss v ds = 12 v, v gs = 0 v n-ch 1 a v ds = - 12 v, v gs = 0 v p-ch - 1 v ds = 12 v, v gs = 0 v, t j = 55 c n-ch 10 v ds = - 12 v, v gs = 0 v, t j = 55 c p-ch - 10 on-state drain current b i d(on) v ds ?? 5 v, v gs = 4.5 v n-ch 15 a v ds ?? - 5 v, v gs = - 4.5 v p-ch - 10 drain-source on-state resistance b r ds(on) v gs = 4.5 v, i d = 5 a n-ch 0.024 0.029 ? v gs = - 4.5 v, i d = - 4.3 a p-ch 0.033 0.041 v gs = 2.5 v, i d = 4.6 a n-ch 0.028 0.034 v gs = - 2.5 v, i d = - 3.6 a p-ch 0.049 0.060 v gs = 1.8 v, i d = 4.1 a n-ch 0.032 0.044 v gs = - 1.8 v, i d = - 1.5 a p-ch 0.070 0.110 v gs = 1.5 v, i d = 2 a n-ch 0.042 0.065 v gs = - 1.5 v, i d = - 1 a p-ch 0.095 0.174 forward transconductance b g fs v ds = 6 v, i d = 5 a n-ch 21 s v ds = - 6 v, i d = - 4.6 a p-ch 12 dynamic a input capacitance c iss n-channel v ds = 6 v, v gs = 0 v, f = 1 mhz p-channel v ds = - 6 v, v gs = 0 v, f = 1 mhz n-ch 500 pf p-ch 1500 output capacitance c oss n-ch 160 p-ch 260 reverse transfer capacitance c rss n-ch 100 p-ch 250 total gate charge q g v ds = 6 v, v gs = 8 v, i d = 6.5 a n-ch 9.7 15 nc v ds = - 6 v, v gs = - 8 v, i d = - 5.6 a p-ch 17 26 n-channel v ds = 6 v, v gs = 4.5 v, i d = 6.5 a p-channel v ds = - 6 v, v gs = - 4.5 v, i d = - 5.6 a n-ch 5.6 8.5 p-ch 10.5 16 gate-source charge q gs n-ch 0.72 p-ch 2.3 gate-drain charge q gd n-ch 0.74 p-ch 2.5 gate resistance r g f = 1 mhz n-ch 0.7 3.5 7 ? p-ch 1.1 5.5 11
document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 3 vishay siliconix SIA527DJ document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 3 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com notes: a. guaranteed by design, not subject to production testing. b. pulse test; pulse width ? 300 s, duty cycle ? 2 %. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit dynamic a tu r n - o n d e l ay t i m e t d(on) n-channel v dd = 6 v, r l = 1.2 ? i d ? 5.2 a, v gen = 4.5 v, r g = 1 ? p-channel v dd = - 6 v, r l = 1.3 ? i d ? - 4.5 a, v gen = - 4.5 v, r g = 1 ? n-ch 10 15 ns p-ch 22 35 rise time t r n-ch 10 15 p-ch 22 35 turn-off delay time t d(off) n-ch 22 30 p-ch 32 50 fall time t f n-ch 10 15 p-ch 15 25 tu r n - o n d e l ay t i m e t d(on) n-channel v dd = 6 v, r l = 1.2 ? i d ? 5.2 a, v gen = 8 v, r g = 1 ? p-channel v dd = - 6 v, r l = 1.3 ? i d ? - 4.5 a, v gen = - 8 v, r g = 1 ? n-ch 5 10 p-ch 10 15 rise time t r n-ch 10 15 p-ch 10 15 turn-off delay time t d(off) n-ch 18 30 p-ch 30 40 fall time t f n-ch 10 15 p-ch 12 20 drain-source body diode characteristics continuous source-drain diode current i s t c = 25 c n-ch 4.5 a p-ch - 4.5 pulse diode forward current (t = 100 s) i sm n-ch 20 p-ch - 15 body diode voltage v sd i s = 5.2 a, v gs = 0 v n-ch 0.85 1.2 v i s = - 4.5 a, v gs = 0 v p-ch - 0.87 - 1.2 body diode reverse recovery time t rr n-channel i f = 5.2 a, di//dt = 100 a/s, t j = 25 c p-channel i f = - 4.5 a, di/dt = - 100 a/s, t j = 25 c n-ch 20 40 ns p-ch 30 60 body diode reverse recovery charge q rr n-ch 5 10 nc p-ch 15 30 reverse recovery fall time t a n-ch 8 ns p-ch 15 reverse recovery rise time t b n-ch 12 p-ch 15
www.vishay.com 4 document number: 64162 s13-1669-rev. a, 29-jul-13 vishay siliconix SIA527DJ this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com n-channel typical characteristics (25 c, unless otherwise noted) output characteristics on-resistance vs. drain current and gate voltage gate charge 0 5 10 15 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v gs =5 v thr u 2 v v gs =1 v v gs =1.5 v v ds - drain-to-so u rce v oltage ( v ) - drain c u rrent (a) i d 0.00 0.02 0.04 0.06 0.0 8 0.10 0 5 10 15 20 v gs =2.5 v v gs =1.5 v v gs =1. 8v v gs =4.5 v - on-resistance ( ) r ds(on) i d -drainc u rrent (a) 0 2 4 6 8 04 8 12 i d =6.5a v ds =9.6 v v ds =3 v v ds =6 v - gate-to-so u rce v oltage ( v ) q g - total gate charge (nc) v gs transfer characteristics capacitance on-resistance vs. junction temperature 0 1 2 3 4 5 0.0 0.3 0.6 0.9 1.2 1.5 t c = 25 c t c = 125 c t c = - 55 c v gs - gate-to-so u rce v oltage ( v ) - drain c u rrent (a) i d c rss 0 200 400 600 8 00 036912 c iss c oss v ds - drain-to-so u rce v oltage ( v ) c - capacitance (pf) 0.7 0. 8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 - 50 - 25 0 25 50 75 100 125 150 v gs =1.5 v ;i d =2a v gs =4.5 v ,2.5 v ,1. 8v ;i d =5a t j -j u nction temperat u re (c) ( n ormalized) - on-resistance r ds(on)
document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 5 vishay siliconix SIA527DJ document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 5 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com n-channel typical characteristics (25 c, unless otherwise noted) source-drain diode forward voltage threshold voltage 0.1 1 10 100 0.0 0.2 0.4 0.6 0. 8 1.0 1.2 t j = 150 c t j = 25 c v sd -so u rce-to-drain v oltage ( v ) - so u rce c u rrent (a) i s 0.2 0.3 0.4 0.5 0.6 0.7 0. 8 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a ( v ) v gs(th) t j - temperat u re (c) on-resistance vs. gate-to-source voltage single pulse power (junction-to-ambient) 0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.0 8 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i d =2a;t j = 25 c i d =5a; t j = 25 c i d = 5 a; t j = 125 c i d =2a;t j = 125 c - on-resistance ( ) r ds(on) v gs - gate-to-so u rce v oltage ( v ) 1000 100 1 0.001 0.01 0.1 10 po w er ( w ) p u lse (s) 20 10 5 15 0 safe operating area, junction-to-ambient 100 1 0.1 1 10 100 10 0.1 t a =25 c single p u lse 100 s limited b yr ds(on) * b v dss limited 1ms 10 ms 100 ms, 1 s 10 s, dc v ds - drain-to-so u rce v oltage ( v ) * v gs > minim u m v gs at w hich r ds(on) is specified -drainc u rrent (a) i d
www.vishay.com 6 document number: 64162 s13-1669-rev. a, 29-jul-13 vishay siliconix SIA527DJ this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com n-channel typical characteristics (25 c, unless otherwise noted) * the power dissipation p d is based on t j(max.) = 150 c, using junction-to-case thermal resistanc e, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to deter mine the current rating, when this rating falls below the package limit. current derating* 0 3 6 9 12 15 0 255075100125150 package limited t c - case temperat u re (c) i d -drainc u rrent (a) power derating 0 2 4 6 8 25 50 75 100 125 150 t c - case temperat u re (c) po w er dissipation ( w )
document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 7 vishay siliconix SIA527DJ document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 7 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com n-channel typical characteristics (25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient 1 0.1 0.01 normalized ef fective t ransient thermal impedance 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 square wave pulse duration (s) single pulse 0.02 0.05 0.1 0.2 duty cycle = 0.5 1. duty cycle, d = 2. per unit base = r th ja = 110 c/w 3. t jm - t a = p dm z th ja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized thermal transient impedance, junction-to-case 10 -3 10 -2 10 -1 10 -4 1 0.01 square wave pulse duration (s) normalized ef fective t ransient thermal impedance duty cycle = 0.5 0.2 0.1 single pulse 0.02 0.05
www.vishay.com 8 document number: 64162 s13-1669-rev. a, 29-jul-13 vishay siliconix SIA527DJ this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com p-channel typical characteristics (25 c, unless otherwise noted) output characteristics on-resistance vs. drain current and gate voltage gate charge 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3 6 9 12 15 v ds - drain-to-source voltage (v) i d - drain current (a) 2 v 1 v 1.5 v v gs = 5 v thru 2.5 v 0.02 03691215 0.04 0.08 0.12 0.16 0.06 0.10 0.14 i d - drain current (a) r ds(on) - on-resistance ( ) v gs = 4.5 v v gs = 2.5 v v gs = 1.8 v 0 3 6 9 12 15 18 v gs - gate-to-source voltage (v) q g - total gate charge 0 2 4 6 8 v ds = 9.6 v v ds = 3 v v ds = 6 v i d = 5.6 a transfer characteristics capacitance on-resistance vs. junction temperature 0 0 0.5 1.0 1.5 2.0 2 4 6 8 10 v gs - gate-to-source voltage (v) i d - drain current (a) t c = 125 c t c = - 55 c t c = 25 c 0 036912 300 600 900 1200 1500 v ds - drain-to-source voltage (v) c - capacitance (pf) c oss c rss c iss 0.7 - 50 - 25 25 75 125 0 50 100 150 0.8 1.0 1.1 0.9 1.3 1.4 1.2 r ds(on) - on-resistance (normalized) t j - junction temperature (c) v gs = 1.8 v i d = 1.5 a v gs = 4.5 v, 2.5 v i d = 4.3 a
document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 9 vishay siliconix SIA527DJ document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 9 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com p-channel typical characteristics (25 c, unless otherwise noted) soure-drain diode forward voltage threshold voltage 0.1 0.0 0.2 0.6 1.0 0.4 0.8 1.2 1 10 100 i s - source current (a) v sd - source-to-drain voltage (v) t j = 150 c t j = 25 c 0.3 - 50 - 25 25 75 125 0 50 100 150 0.4 0.7 0.5 0.6 0.8 0.9 t j - junction temperature (c) v gs(th) - (v) i d = 250 a on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 0.00 01 3 245 0.12 0.09 0.06 0.03 0.15 v gs - gate-to-source voltage (v) r ds(on) - on-resistance ( ) i d = 1.5 a, t j = 25 c i d = 5.5 a, t j = 25 c i d = 5.5 a, t j = 125 c i d = 1.5 a, t j = 125 c 0 0.001 0.01 0.1 1 10 100 1000 5 10 15 20 time (s) power (w) safe operating area, junction-to-ambient 0.01 0.1 1 100 10 0.1 1 10 100 v ds - drain-to-source voltage (v) * v gs > minimum v gs at which r ds(on) is specified i d - drain current (a) limited by r ds(on) * bvdss limited t a = 25 c single pulse 1 ms 10 ms 10 s 100 ms 100 s dc 1 s
www.vishay.com 10 document number: 64162 s13-1669-rev. a, 29-jul-13 vishay siliconix SIA527DJ this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com p-channel typical characteristics (25 c, unless otherwise noted) * the power dissipation p d is based on t j(max.) = 150 c, using junction-to-case thermal resistanc e, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to deter mine the current rating, when this rating falls below the package limit. current derating* 0 0 25 50 75 100 150 125 2 4 6 10 8 12 14 t c - case temperature (c) i d - drain current (a) package limited power derating 0 25 50 75 100 125 150 2 4 6 8 t c - case temperature (c) power dissipation (w)
document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 11 vishay siliconix SIA527DJ document number: 64162 s13-1669-rev. a, 29-jul-13 www.vishay.com 11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact:: pmostechsupport@vishay.com p-channel typical characteristics (25 c, unless otherwise noted) vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?64162 . normalized thermal transient impedance, junction-to-ambient 10 -4 10 -3 10 -2 10 -1 1 10 100 1000 1 0.1 0.01 s quare wave pul s e duration ( s ) normalized effective tran s ient thermal impedance note s : 1. duty cycle, d = 2. per unit ba s e = r thja = 110 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 4. s urface mounted t 1 p dm t 2 duty cycle = 0.5 s ingle pul s e 0.2 0.05 0.1 0.02 normalized thermal transient impedance, junction-to-case 10 -4 10 -3 10 -2 10 -1 1 0.01 s quare wave pul s e duration ( s ) normalized effective tran s ient thermal impedance s ingle pul s e 0.05 0.02 duty cycle = 0.5 0.2 0.1
vishay siliconix package information document number: 73001 06-aug-07 www.vishay.com 1 powerpak ? sc70-6l dim single pad dual pad millimeters inches millimeters inches min nom max min nom max min nom max min nom max a 0.675 0.75 0.80 0.027 0.030 0.032 0.675 0.75 0.80 0.027 0.030 0.032 a1 0 - 0.05 0 - 0.002 0 - 0.05 0 - 0.002 b 0.23 0.30 0.38 0.009 0.012 0.015 0.23 0.30 0.38 0.009 0.012 0.015 c 0.15 0.20 0.25 0.006 0.008 0.010 0.15 0.20 0.25 0.006 0.008 0.010 d 1.98 2.05 2.15 0.078 0.081 0.085 1.98 2.05 2.15 0.078 0.081 0.085 d1 0.85 0.95 1.05 0.033 0.037 0.041 0.513 0.613 0.713 0.020 0.024 0.028 d2 0.135 0.235 0.335 0.005 0.009 0.013 e 1.98 2.05 2.15 0.078 0.081 0.085 1.98 2.05 2.15 0.078 0.081 0.085 e1 1.40 1.50 1.60 0.055 0.059 0.063 0.85 0.95 1.05 0.033 0.037 0.041 e2 0.345 0.395 0.445 0.014 0.016 0.018 e3 0.425 0.475 0.525 0.017 0.019 0.021 e 0.65 bsc 0.026 bsc 0.65 bsc 0.026 bsc k 0.275 typ 0.011 typ 0.275 typ 0.011 typ k1 0.400 typ 0.016 typ 0.320 typ 0.013 typ k2 0.240 typ 0.009 typ 0.252 typ 0.010 typ k3 0.225 typ 0.009 typ k4 0.355 typ 0.014 typ l 0.175 0.275 0.375 0.007 0.011 0.015 0.175 0.275 0.375 0.007 0.011 0.015 t 0.05 0.10 0.15 0.002 0.004 0.006 ecn: c-07431 ? rev. c, 06-aug-07 dwg: 5934 e2 back s ide view of s ingle back s ide view of dual note s : 1. all dimen s ion s a re in millimeter s 2. p a ck a ge o u tline excl us ive of mold fl as h a nd met a l bu rr 3 . p a ck a ge o u tline incl us ive of pl a ting pin1 pin6 pin5 pin4 pin2 pin 3 a z detail z z d e k1 k2 c a1 k 3 k2 k2 e b b e pin6 pin5 pin4 pin1 pin 3 pin2 e1 e1 e1 l l k4 k k k d1 d2 d1 d1 k1 e 3
application note 826 vishay siliconix www.vishay.com document number: 70487 1 revision: 18-oct-13 application note recommended pad layout for powerpak ? sc70-6l dual 1 2.500 (0.09 8 ) 0.350 (0.014) 0.275 (0.011) 0.613 (0.024) 0.300 (0.012) 0.325 (0.013) 0.950 (0.037) 0.475 (0.019) 2.500 (0.09 8 ) 0.275 (0.011) 0.160 (0.006) 1.600 (0.063) dimensions in mm (inches) 0.650 (0.026) return to index
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